48451 Embedded Systems Studio A
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Credit points: 6 cp
Subject level:
Undergraduate
Result type: Grade, no marksRequisite(s): 48441 Introductory Digital Systems
Recommended studies:
Knowledge of basic digital systems and microprocessor/computer architecture is essential for this subject.
Description
The subject has two major components: (i) analysis/design, and (ii) implementation, of an advanced computing node. The subject provides an in-depth understanding of the analysis/design and implementation of advanced digital hardware at medium scale computer system building block level. It builds on the basics of 48441 Introductory Digital Systems introduced in the earlier fields of practice subject.
The subject is studio based and concepts such as digital design process, functional design, implementation technologies, advanced digital architectures, and memory and I/O systems are examined within the context of project work. Students are able to plan, design, and develop digital intellectual property (IP) using FPGAs and hardware description languages (HDLs) such as Verilog and VHDL after completing this subject.
Subject learning objectives (SLOs)
Upon successful completion of this subject students should be able to:
| 1. | Analyse, design and implement a programmable digital system based on a user requirement specification, and investigate advanced digital systems architectures. (C.1) |
|---|---|
| 2. | Demonstrate in-depth understanding of the analysis/design and implementation of advanced digital hardware at medium scale computer system building block level. (C.1) |
| 3. | Utilise computer-aided design, including the use of VHDL or Verilog specification, simulation and programmable FPGA implementation technologies, Register transfer level, Data path and control units. (D.1) |
Course intended learning outcomes (CILOs)
This subject also contributes specifically to the development of the following Course Intended Learning Outcomes (CILOs):
- Design Oriented: FEIT graduates apply problem solving, design and decision-making methodologies to develop components, systems and processes to meet specified requirements. (C.1)
- Technically Proficient: FEIT graduates apply abstraction, mathematics and discipline fundamentals, software, tools and techniques to evaluate, implement and operate systems. (D.1)
Contribution to the development of graduate attributes
Engineers Australia Stage 1 Competencies
This subject contributes to the development of the following Engineers Australia Stage 1 Competencies:
- 1.3. In-depth understanding of specialist bodies of knowledge within the engineering discipline.
- 2.2. Fluent application of engineering techniques, tools and resources.
- 2.3. Application of systematic engineering synthesis and design processes.
- 2.4. Application of systematic approaches to the conduct and management of engineering projects.
Teaching and learning strategies
The subject is studio based and will focus on learning through implementing an agreed learning contract.
This subject uses a problem-based learning strategy that allows students to research and develop their own solutions to complex design challenges. The assessment tasks are practice-based and are designed to reflect current industry practice.
Each week, the studio session will commence with a group discussion on problems faced over the previous week, as well as tips and revision on different aspects of the FPGA design flow.
Student learning is supported in the following way:
1. Group discussions;
2. Revision of digital design learning concepts in the FPGA context;
3. Teams site dedicated to quick responses to student problems and questions;
4. Providing continuous feedback during the design process in studio hours.
Content (topics)
Advanced digital design through the development of a prototype design agreed upon in the student's learning contract. Learning components encompassed by this include:
1. Verilog/VHDL programming;
2. Revision of digital design concepts: combinatorial design, sequential design, state machines, arithmetic logic units;
3. Digital design architectures;
4. Timing and interfacing requirements.
Assessment
Assessment task 1: Learning Contract
| Intent: | To create a plan i.e. a learning contract, to develop a prototype digital device using an FPGA. |
|---|---|
| Objective(s): | This assessment task addresses the following subject learning objectives (SLOs): 1 This assessment task contributes to the development of the following Course Intended Learning Outcomes (CILOs): C.1 |
| Type: | Project |
| Groupwork: | Individual |
| Weight: | 10% |
| Length: | 1000 words |
| Criteria: | It will be published with each assessment requirements |
Assessment task 2: Mid-project presentation and report
| Intent: | To provide a progress update and gain feedback on project progress. |
|---|---|
| Objective(s): | This assessment task addresses the following subject learning objectives (SLOs): 1, 2 and 3 This assessment task contributes to the development of the following Course Intended Learning Outcomes (CILOs): C.1 and D.1 |
| Type: | Project |
| Groupwork: | Individual |
| Weight: | 30% |
| Length: | TBA |
| Criteria: | It will be published with each assessment requirement. |
Assessment task 3: Final project report and presentation
| Intent: | To present final prototype, demonstrate use and deliver report on project. |
|---|---|
| Objective(s): | This assessment task addresses the following subject learning objectives (SLOs): 1, 2 and 3 This assessment task contributes to the development of the following Course Intended Learning Outcomes (CILOs): C.1 and D.1 |
| Type: | Project |
| Groupwork: | Individual |
| Weight: | 60% |
| Length: | 15 minute presentation; 5000 word report |
Minimum requirements
In order to pass the subject, a student must achieve an overall mark of 50% or more.
Recommended texts
A. Moore, FPGA for Dummies, 2nd Intel Special Edition, John Wiley and Sons, 2017
S. Hugg, Designing Video Game Hardware in Verilog, October 2018
P. Wilson, Design Recipes for FPGAs, 2nd edition, Elsevier 2016
J. Hamblin, T. Hall, and M. Furman, Rapid Prototyping of Digital Systems, SOPC edition, Springer 2008
References
Wakeley John F., Digital Design Principles and Practices, 3rd edition, Prentice Hall, 2000